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Wiring board for bump bonding semiconductor device assembled from the wiring board and manufacturing method of wiring board for bump bonding

机译:由该配线基板组装而成的凸点接合用半导体装置用配线基板及凸点接合用配线基板的制造方法

摘要

The present invention was preventing the occurrence of disconnection between the bump and the wiring and less variation in the bump height, and a method of manufacturing a semiconductor device and a junction circuit board for the bump assembled using this excellent bump-bonding circuit board, the circuit board for production to provide.; To one hour of using a dielectric layer having a conductive layer on the surface to prepare a bump bonding circuit boards, first, on one surface of the conductive layer is provided with a first resist layer, and exposed and developed, and the area other than the bump formation area the first resist layer is removed, which, by half etching a conductive layer bumps are formed then, and remove the first resist layer as needed, there is provided a second resist layer, and exposed and developed, and the exposed conductive layer the wiring pattern is formed by etching. Then, after removing the resist above if desired wiring pattern, a protective resist layer is provided on the entire surface of the wiring pattern side, and is exposed and developed, then the exposed surface of the bumps, and then, the protective resist layer is cured. Then, by etching from the surface side of the insulating layer in a desired region a hole formed blank, the surface of the via hole to the exposed lower surface and the bump are made of zinc-coated metal.
机译:本发明是为了防止凸块与布线之间的断线的发生以及凸块高度的偏差少,因此,本发明的半导体装置和使用该优异的凸点接合电路基板组装的凸块的接合电路基板的制造方法是:为生产提供电路板。对于使用在表面上具有导电层的介电层制备凸点键合电路板一个小时,首先,在导电层的一个表面上设置第一抗蚀剂层,并进行曝光和显影,以及除在凸块形成区域中,去除第一抗蚀剂层,然后,通过半蚀刻导电层,形成凸块,并且根据需要去除第一抗蚀剂层,提供第二抗蚀剂层,并且进行曝光和显影,并且暴露的导电性在该层中,通过蚀刻形成布线图案。然后,在去除了需要的布线图案上方的抗蚀剂之后,在布线图案侧的整个表面上设置保护抗蚀剂层,并对其进行曝光和显影,然后使凸块的暴露表面露出,然后形成保护抗蚀剂层。治愈。然后,通过在期望区域中从绝缘层的表面侧蚀刻形成为空白的孔,通孔到暴露的下表面的表面和凸块由镀锌金属制成。

著录项

  • 公开/公告号KR100335875B1

    专利类型

  • 公开/公告日2002-05-08

    原文格式PDF

  • 申请/专利权人 NULL NULL;

    申请/专利号KR19990026461

  • 发明设计人 간다에이자부로;시모지다쿠미;

    申请日1999-07-02

  • 分类号H01L21/50;

  • 国家 KR

  • 入库时间 2022-08-22 00:29:43

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