首页> 外国专利> COMPUTER READABLE MEDIUM ENCODED WITH A HARDWARE DESCRIPTION LANGUAGE DESCRIBING A VIRTUAL COMPONENT FOR AN INTEGRATED CIRCUIT DESIGN METHOD OF VERIFYING A VIRTUAL COMPONENT AND METHOD MANUFACTURING AN INTEGRATED CIRCUIT

COMPUTER READABLE MEDIUM ENCODED WITH A HARDWARE DESCRIPTION LANGUAGE DESCRIBING A VIRTUAL COMPONENT FOR AN INTEGRATED CIRCUIT DESIGN METHOD OF VERIFYING A VIRTUAL COMPONENT AND METHOD MANUFACTURING AN INTEGRATED CIRCUIT

机译:硬件描述语言编码的计算机可读介质,描述了用于验证虚拟组件的集成电路的设计方法和制造集成电路的方法的虚拟组件

摘要

PURPOSE: To provide circuit components for system LSI where the provided circuit components can be easily verified on the user side. CONSTITUTION: In the device, a verification support circuit, written in the hardware description language, is provided for a circuit component body which is written in hardware description language provided with a particular circuit function connected, so that it can be separated from the circuit component body by the provider of the circuit component and also connected to an interior of the circuit of the circuit component body, so that no adverse effects are imparted to the operation of the circuit component body itself, even when the connection with the circuit component body is cut off.
机译:目的:提供用于系统LSI的电路组件,其中所提供的电路组件可以在用户侧轻松进行验证。构成:在该设备中,为电路组件主体提供了用硬件描述语言编写的验证支持电路,该电路以硬件描述语言编写,并具有连接的特定电路功能,因此可以与电路组件分离电路部件的提供者的主体,并且还连接到电路部件主体的电路的内部,从而即使与电路部件主体的连接是自由的,也不会给电路部件主体本身的操作带来不利影响。隔断。

著录项

  • 公开/公告号KR20020076134A

    专利类型

  • 公开/公告日2002-10-09

    原文格式PDF

  • 申请/专利权人 KABUSHIKI KAISHA TOSHIBA;

    申请/专利号KR20020015998

  • 发明设计人 KATAYAMA ISAO;

    申请日2002-03-25

  • 分类号G06F11/22;

  • 国家 KR

  • 入库时间 2022-08-22 00:30:17

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