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High-performance switches and routers with parallel switching domains having sub-unity speedup

机译:具有子域加速的具有并行交换域的高性能交换机和路由器

摘要

Crossbar and queing chips with integrated point-to-point packet-based channel interfaces and resulting high internal aggregate bandwidths are designed as modules for a scalable CIOQ-based switch fabric that supports high-capacity fixed-length cell switching. By aggregating large amounts of traffic onto a single switching chip, the system pin-count and chip-count is dramatically reduced. The switch fabric offers improved switching capacity while operating at sub-unity speedup to relax cell-time requirments.
机译:具有集成的基于点对点数据包的通道接口的纵横制交换机和队列芯片以及由此产生的较高的内部聚合带宽被设计为可扩展的基于CIOQ的交换矩阵的模块,该交换矩阵支持大容量固定长度信元交换。通过将大量流量聚合到单个交换芯片上,可以大大减少系统的引脚数和芯片数。交换矩阵提供了改进的交换容量,同时以子社区加速运行,以放松对单元时间的要求。

著录项

  • 公开/公告号AU7864401A

    专利类型

  • 公开/公告日2002-02-25

    原文格式PDF

  • 申请/专利权人 CONEXANT SYSTEMS INC.;

    申请/专利号AU20010078644

  • 发明设计人 KEWEI YANG;YUANLONG WANG;FENG CHEN LIN;

    申请日2001-08-14

  • 分类号H04L12/56;H04Q11/04;

  • 国家 AU

  • 入库时间 2022-08-22 00:39:09

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