首页> 外国专利> METHOD FOR PRODUCING SILICON NANOSTRUCTURE, LATTICE OF SILICON QUANTUM CONDUCTING TUNNELS, AND DEVICES BUILT AROUND THEM

METHOD FOR PRODUCING SILICON NANOSTRUCTURE, LATTICE OF SILICON QUANTUM CONDUCTING TUNNELS, AND DEVICES BUILT AROUND THEM

机译:硅纳米结构,硅量子传导隧道的晶格及其周围设备的制造方法

摘要

A process for controllably forming silicon nanostructures such as a silicon quantum wire array. A silicon surface is sputtered by a uniform flow of nitrogen molecular ions in an ultrahigh vacuum so as to form a periodic wave-like relief in which the troughs of said relief are level with the silicon-insulator border of the SOI material. The ion energy, the ion incidence angle to the surface of said material, the temperature of the silicon layer, the formation depth of the wave-like relief, the height of said wave-like relief and the ion penetration range into silicon are all determined on the basis of a selected wavelength of the wave-like relief in the range 9 nm to 120 nm. A silicon nitride mask having pendant edges is used to define the area of the silicon surface on which the array is formed. Impurities are removed from the silicon surface within the mask window prior to sputtering. For the purpose of forming a silicon quantum wire array, the thickness of the SOI silicon layer is selected to be greater than the sum of said formation depth, said height and said ion penetration range, the fabrication of the silicon wires being controlled by a threshold value of a secondary ion emission signal from the SOI insulator. The nanostructure may be employed in optoelectronic and nanoelectonic devices such as a FET. IMAGE
机译:可控地形成硅纳米结构(例如硅量子线阵列)的过程。在超高真空中,通过氮分子离子的均匀流动来溅射硅表面,从而形成周期性的波状浮雕,其中所述浮雕的波谷与SOI材料的硅绝缘体边界齐平。确定离子能量,离子相对于所述材料表面的入射角,硅层的温度,波浪形浮雕的形成深度,所述波浪形浮雕的高度以及离子在硅中的渗透范围基于波状浮雕的选定波长在9nm至120nm范围内。具有悬垂边缘的氮化硅掩模用于限定在其上形成阵列的硅表面的区域。在溅射之前,从掩模窗口内的硅表面去除杂质。为了形成硅量子线阵列,将SOI硅层的厚度选择为大于所述形成深度,所述高度和所述离子穿透范围之和,硅线的制造由阈值控制。来自SOI绝缘子的二次离子发射信号的值。纳米结构可用于光电和纳米电子器件中,例如FET。 <图像>

著录项

  • 公开/公告号IS6393A

    专利类型

  • 公开/公告日2002-05-24

    原文格式PDF

  • 申请/专利权人 SCEPTRE ELECTRONICS LIMITED;

    申请/专利号IS20020006393

  • 发明设计人 VALERY K. SMIRNOV;DMITRY S. KIBALOV;

    申请日2002-05-24

  • 分类号H01L21/265;H01L21/335;H01L29/12;

  • 国家 IS

  • 入库时间 2022-08-22 00:44:37

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