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Program storage device containing instructions that are spaced apart by unused bits that end on word boundaries and which generate chip testing bit streams of any length
Program storage device containing instructions that are spaced apart by unused bits that end on word boundaries and which generate chip testing bit streams of any length
A system for testing integrated circuit chips is comprised of a pattern generator that is coupled to a memory which stores variable length instructions that specify sets of bit streams for testing the chips. Each variable length instruction includes a code which indicates the number of bit streams in the set. Each bit stream in the set consists of a selectable number of bits which start on a word boundary and vary in increments of one bit. If the code indicates that the number of bit streams in a set is only one, then that one bit stream is stored in consecutive words of the memory. If the code indicates the number bit streams in a set is more than one, then those multiple bit streams are stored in an interleaved fashion in consecutive words in the memory. A respective series of unused bits starts immediately after each bit stream and ends on a word boundary. Each series of unused bits causes the next bit stream to start on a word boundary; and, that simplifies the circuitry which the pattern generator uses to address the bit streams.
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