首页> 外国专利> Reset functional attaching dynamic die counting-down circuit and set functional attaching dynamic die counting-down circuit

Reset functional attaching dynamic die counting-down circuit and set functional attaching dynamic die counting-down circuit

机译:复位功能贴装动态芯片倒计时电路并设置功能贴装动态芯片倒计时电路

摘要

PROBLEM TO BE SOLVED: To provide a dynamic frequency divider with resetting function which can be initialized in arbitrary timing. ;SOLUTION: This dynamic frequency divider when receiving a reset signal from its reset terminal sets a node 118 to a high level by a P channel MOS transistor(TR) 125, a node 119 to a low level by an N-channel MOS TR 126, a node 110 to the opposite level from a clock signal by an N-channel MOS TR 122, and a node 111 to the same level with the clock signal by a P-channel MOS TR 123. A frequency-division clock signal can therefore be risen at the rising end of the clock signal after the reset signal is inputted from the reset terminal, and the circuit can be initialized in arbitrary timing. Furthermore, since a path where a through-current flows is not formed at initialization, the power consumption does not increase at initialization.;COPYRIGHT: (C)2000,JPO
机译:解决的问题:提供一种具有复位功能的动态分频器,可以在任意时序中对其进行初始化。 ;解决方案:该动态分频器在从其复位端子接收到复位信号时,通过P沟道MOS晶体管(TR)125将节点118设置为高电平,通过N沟道MOS TR 126将节点119设置为低电平。通过N沟道MOS TR 122将节点110设为与时钟信号相反的电平,通过P沟道MOS TR 123将节点111设为与时钟信号相同的电平。因此,可以使用分频时钟信号。从复位端子输入了复位信号后,在时钟信号的上升端使“ 1”上升,从而能够以任意的定时对电路进行初始化。此外,由于在初始化时不形成流过直通电流的路径,所以在初始化时功耗不会增加。版权所有:(C)2000,JPO

著录项

  • 公开/公告号JP3339428B2

    专利类型

  • 公开/公告日2002-10-28

    原文格式PDF

  • 申请/专利权人 日本電気株式会社;

    申请/专利号JP19980316045

  • 发明设计人 菅野 浩;

    申请日1998-11-06

  • 分类号H03K21/38;H03K23/00;

  • 国家 JP

  • 入库时间 2022-08-22 01:00:46

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号