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A Method of New simultaneous Switching Noise Analysis and Modeling for High-Speed and High-Density CMOS IC Package Design
A Method of New simultaneous Switching Noise Analysis and Modeling for High-Speed and High-Density CMOS IC Package Design
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机译：高速，高密度CMOS IC封装设计的新型同时开关噪声分析与建模方法
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摘要
PURPOSE: An SSN(Simultaneous Switching Noise) analysis and modeling method is provided to design a CMOS IC package by using the SSN model so that it can estimate an SSN of a VLSI based on a sub micron. CONSTITUTION: The method comprises the steps of determining a ground path current by considering all the circuit components such as a transistor resistance, a lead inductance, a load capacitance, an oscillation frequency of a noise signal and others, measuring a slew rate in switching devices, and measuring a slew rate of the SSN by using an alpha square law of a sub micron transistor drain current. The induced SSN model includes all the threshold circuit function and package parameters. The SSN model can be certified by a general circuit simulator. The precision of the SSN model is within a 5 % error range.
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