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HIGHLY SELECTIVE AND COMPLETE INTERCONNECT METAL LINE AND VIA/CONTACT HOLE FILLING BY ELECTROLESS PLATING

机译：高选择性和完整的互连金属线以及通过无电电镀的通孔/接触孔填充

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摘要

ABSTRACTHIGHLY SELECTIVE AND COMPLETE INTERCONNECT METAL LINE AND VIAICONTACT HOLE FILLING BY ELECTROLESS PLATINGA novel method for the activation of semiconductor substrates for highly selective electroless copper plating in multilayer interconnect metallization lines and vias/contact holes has been developed. A copper-seeded polysilicon layer is provided over the substrate to facilitate growth of copper into the vias. Subsequent rinsing and chemical-mechanical polishing processes allow removal of overgrowth of copper and the polysilicon layer to achieve overall smooth topography of the copper surface and the insulating layer surface of the substrate.Figure 3 is to be published.

机译：抽象高度选择性和完全互连的金属线和通过无电电镀进行孔接触孔填充一种高选择性激活半导体衬底的新方法多层互连金属化线中的化学镀铜和已开发出通孔/接触孔。铜籽晶多晶硅层是提供在衬底上以促进铜生长到通孔中。后续的漂洗和化学机械抛光工艺可消除过度生长铜和多晶硅层，以实现整体光滑的形貌基板的铜表面和绝缘层表面。图3即将发布。

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公开/公告号SG79235A1

专利类型
公开/公告日2001-03-20

原文格式PDF
申请/专利权人 NATIONAL UNIVERSITY OF SINGAPORE;
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申请/专利号SG19980001811
发明设计人 NG HOU TEE;SAM LI FONG YAU;
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申请日1998-07-16
分类号H01L21/768;H01L21/288;C23C18/30;H01L21/288;H01L23/485;H01L21/445;C23C18/54;
国家 SG
入库时间 2022-08-22 01:23:33

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