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DIGITAL DATA CODING PROCESSING CIRCUIT, CODING PROCESSING METHOD, AND DIGITAL DATA RECORDER PROVIDED WITH CODING PROCESSING CIRCUIT

机译:具有编码处理电路的数字数据编码处理电路,编码处理方法和数字数据记录器

摘要

PROBLEM TO BE SOLVED: To provide a system that suppresses access frequency to an external storage memory in order to increase a recording speed to a digital data recording medium such as a DVD.;SOLUTION: Generation of an error check code and scramble processing are conducted in parallel, and just after them, an inner code of data in the unit of sectors is generated, an ID, the error check code for the ID, scrambled data, the error check code in the unit of sectors and the inner code are written in a temporary storage memory. Thus, this system needs only one access to the temporary memory while a conventional technology has required three accesses to the temporary storage memory. After the above processing up to the unit of ECC blocks, generation/addition of an ECC block outer code and an inner code with respect to the ECC block outer code are executed.;COPYRIGHT: (C)2001,JPO
机译:解决的问题:提供一种抑制对外部存储存储器的访问频率以提高对诸如DVD之类的数字数据记录介质的记录速度的系统;解决方案:进行错误校验码的产生和加扰处理。并行地并且紧接着它们之后,生成以扇区为单位的数据的内部代码,ID,用于该ID的错误校验码,加扰的数据,以扇区为单位的错误校验代码和内部代码。在临时存储中因此,该系统仅需要对临时存储器的一次访问,而常规技术需要对临时存储存储器的三次访问。经过上述处理,直到达到ECC块的单位,才执行ECC块外部代码的生成/添加以及相对于ECC块外部代码的内部代码。版权所有:(C)2001,JPO

著录项

  • 公开/公告号JP2001156649A

    专利类型

  • 公开/公告日2001-06-08

    原文格式PDF

  • 申请/专利权人 RICOH CO LTD;

    申请/专利号JP19990332571

  • 发明设计人 AZENO MASAHIKO;

    申请日1999-11-24

  • 分类号H03M13/29;G11B20/14;G11B20/18;

  • 国家 JP

  • 入库时间 2022-08-22 01:27:00

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