首页> 外国专利> CIRCUIT SUBSTRATE WITH ANTENNA, METHOD FOR MANUFACTURING CIRCUIT SUBSTRATE WITH ANTENNA, CIRCUIT SUBSTRATE WITH CAPACITANCE, METHOD FOR MANUFACTURING CIRCUIT SUBSTRATE WITH CAPACITANCE, CIRCUIT SUBSTRATE WITH ANTENNA AND CAPACITANCE, METHOD FOR MANUFACTURING CIRCUIT SUBSTRATE WITH ANTENNA AND CAPACITANCE AND NON- CONTACT INFORMATION TRANSFER DEVICE

CIRCUIT SUBSTRATE WITH ANTENNA, METHOD FOR MANUFACTURING CIRCUIT SUBSTRATE WITH ANTENNA, CIRCUIT SUBSTRATE WITH CAPACITANCE, METHOD FOR MANUFACTURING CIRCUIT SUBSTRATE WITH CAPACITANCE, CIRCUIT SUBSTRATE WITH ANTENNA AND CAPACITANCE, METHOD FOR MANUFACTURING CIRCUIT SUBSTRATE WITH ANTENNA AND CAPACITANCE AND NON- CONTACT INFORMATION TRANSFER DEVICE

机译：具有天线的电路基板，具有天线的电路基板制造方法，具有电容的电路基板，具有电容制造电路基板的方法，具有天线和电容的电路基板与电容和电容的制造方法，具有导体和电容的方法

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摘要

PROBLEM TO BE SOLVED: To provide a substrate and device with antenna and capacity with high use efficiency of a substrate surface at low manufacturing cost. SOLUTION: An antenna pattern Apn and a first polar plate pattern are integrally provided on one surface of a substrate Sbt, and a second connection pattern p2 is provided on the lower side by etching, etc., separately from the patterns. A non-conductive layer covering the first polar plate pattern, crossing the antenna pattern Apn, covering its outside end Aoe and exposing part of the second connection pattern p2 on the lower side and the outside and Aoe is provided with a prescribed dielectric factor and thickness by application, etc. A second polar plate pattern Plt2 superposed on the first polar plate pattern and an upper second connection pattern to reach the exposed part of the outside end Aoe from the exposed part of the lower second connection pattern p2 by crossing the antenna pattern Apn are integrally formed as a conductive layer Cdp on the non-conductive layer Ins by printing, etc. The conductive layer Cdp and each exposed part are joined and electrically connected by welding, etc.

机译：解决的问题：以低的制造成本提供具有天线和容量的基板和装置，以及基板表面的高使用效率。解决方案：天线图案Apn和第一极板图案一体地设置在基板Sbt的一个表面上，第二连接图案p2通过蚀刻等方法与图案分开设置在下侧。覆盖第一极板图案，与天线图案Apn交叉，覆盖其外端Aoe并使第二连接图案p2的下侧和外部以及Aoe的一部分暴露的非导电层具有规定的介电常数和厚度。第二极板图案Plt2与第一极板图案和上部第二连接图案重叠，从而通过与天线图案交叉而从下部第二连接图案p2的露出部分到达外端Aoe的露出部分。通过印刷等在非导电层Ins上将Apn一体形成为导电层Cdp。通过焊接等将导电层Cdp与各露出部分接合并电连接。

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公开/公告号JP2001307051A

专利类型
公开/公告日2001-11-02

原文格式PDF
申请/专利权人 SONY CORP;
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申请/专利号JP20000121324
发明设计人 TANIMURA KAZUNARI;
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申请日2000-04-21
分类号G06K19/07;B42D15/10;G06K19/077;H05K1/16;
国家 JP
入库时间 2022-08-22 01:30:04

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