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METHOD FOR ADJUSTING OPERAND BUS OF SUPER SCHOLAR TYPE PROCESSOR AND SUPER SCHOLAR TYPE PROCESSOR USING THE METHOD

机译:调整超学术型处理器和超学术型处理器的运行总线的方法

摘要

PROBLEM TO BE SOLVED: To provide a super scholar type processor by which an operand bus adjusting circuit is simplified and a circuit scale is reduced.;SOLUTION: An instruction decoder 1a is provided with a means for reading an instruction code and transmitting the number of operand buses requested by each instruction to an operand bus control circuit 3a. The circuit 3a assigns a priority usage right to (n)operand buses concerning the first instruction which is the moss advanced one in an instruction group to be simultaneously issued when the maximum number of the operands held by one instruction is made to be (n), successively assigns the priority usage right to the (n) operand buses concerning the instruction just after the first one and re-distributes the usage right of the operand bus which is not used by the instruction where its usage is below the maximum number among the whole operand buses which are already assigned to another instruction to the instruction where the operand bus is not assigned.;COPYRIGHT: (C)2001,JPO
机译:解决的问题:提供一种超级学者型处理器,通过该处理器可以简化操作数总线调整电路并减小电路规模。解决方案:指令解码器1a配备有读取指令代码并传输指令数的装置。每个指令向操作数总线控制电路3a请求的操作数总线。当使一个指令所保持的操作数的最大数量为(n)时,电路3a向与要同时发布的指令组中的moss进阶的第一指令有关的(n)操作数总线分配优先使用权。紧接在第一个指令之后,依次向(n)个操作数总线分配与该指令相关的优先级使用权,并重新分配该指令中未使用的操作数总线的使用权,该指令未使用该操作数。已分配给另一条指令的整个操作数总线到未分配该操作数总线的指令。版权所有:(C)2001,JPO

著录项

  • 公开/公告号JP2001014164A

    专利类型

  • 公开/公告日2001-01-19

    原文格式PDF

  • 申请/专利权人 RICOH CO LTD;

    申请/专利号JP19990188171

  • 发明设计人 HARA KAZUHIKO;

    申请日1999-07-01

  • 分类号G06F9/38;G06F9/30;G06F9/34;

  • 国家 JP

  • 入库时间 2022-08-22 01:31:37

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