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Scheduling-based hardware-software co-synthesis of heterogeneous distributed embedded systems

机译:异构分布式嵌入式系统的基于调度的软硬件协综合

摘要

Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power, and cost goals. Embedded systems are generally specified in terms of a set of acyclic task graphs. According to one embodiment of the present invention, a co-synthesis algorithm, called COSYN, starts with periodic task graphs with real-time constraints and produces a low-cost heterogeneous distributed embedded system architecture meeting these constraints. The algorithm has the following features: 1) it allows the use of multiple types of processing elements (PEs) and inter-PE communication links, where the links can take various forms (point-to-point, bus, local area network, etc.), 2) it supports both concurrent and sequential modes of communication and computation, 3) it employs a combination of preemptive and non-preemptive scheduling, 4) it introduces the concept of an association array to tackle the problem of multi-rate systems (which are commonly found in multimedia applications), 5) it uses a static scheduler based on deadline-based priority levels for accurate performance estimation of a co-synthesis solution, 6) it uses a new task clustering technique which takes the changing nature of the critical path in the task graph into account, 7) it supports pipelining of task graphs to derive a cost-efficient architecture, 8) it supports a mix of various technologies, such as 5 V CMOS, 3.3 V CMOS, 2.7 V CMOS, ECL, etc., to meet embedded system constraints and minimize power dissipation, and 9) if desired, it also optimizes the architecture for power consumption.
机译:硬件-软件协同合成是将嵌入式系统规范划分为硬件和软件模块,以满足性能,功耗和成本目标的过程。通常根据一组非循环任务图来指定嵌入式系统。根据本发明的一个实施例,被称为COSYN的协综合算法从具有实时约束的周期性任务图开始,并产生满足这些约束的低成本异构分布式嵌入式系统架构。该算法具有以下特征:1)它允许使用多种类型的处理元件(PE)和PE间通信链接,其中链接可以采用各种形式(点对点,总线,局域网等)。 ),2)支持通讯和计算的并发和顺序模式,3)采用抢先式和非抢先式调度的组合,4)引入关联数组的概念来解决多速率系统的问题(通常在多媒体应用程序中找到),5)它使用基于基于截止日期的优先级的静态调度程序来准确评估协同综合解决方案的性能,6)它使用一种新的任务聚类技术,该技术采用了不断变化的特性考虑到任务图中的关键路径,7)支持任务图的流水线化以得出具有成本效益的体系结构,8)支持多种技术的混合,例如5 V CMOS,3.3 V CMOS,2.7 V CMOS, ECL等,以满足嵌入9)如果需要的话,它还优化了功耗架构。

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