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Fitting for incremental compilation of electronic designs

机译：适合电子设计的增量编译

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摘要

A technique is disclosed for efficiently placing logic cells from an electronic design during an incremental recompile. This is accomplished by fixing in place as many logic cells as possible during the recompile procedure. To understand how this works, recognize than an "original electronic design" has already been fully compiled. Now, a user has made one or more changes to the original electronic design to produce a "changed electronic design." The disclosed technique fits the changed electronic design, during incremental recompile, without effecting too much of the logic previously fit during compilation of the original electronic design. Initially, a compiler attempts to fit logic cells of the changed portion of the electronic design onto available logic elements of the hardware device while confining logic cells from the unchanged portion of the changed electronic design to their original positions.PPIf this fails, the compiler allows logic cells from the unchanged portion of the changed electronic design to shift by a limited amount to other logic elements within the target hardware device. At first, this shifting is fairly constrained in order to preserve as much of the original compilation's placement as possible. However, if fitting can not be accomplished under these constraints, gradually the constraints are lifted, until a fit is achieved.

机译：公开了一种用于在增量重新编译期间有效地放置来自电子设计的逻辑单元的技术。这是通过在重新编译过程中固定尽可能多的逻辑单元来实现的。要了解它是如何工作的，可以认识到“原始电子设计”已经被完全编译。现在，用户对原始电子设计进行了一个或多个更改，以生成“更改的电子设计”。所公开的技术在增量重新编译期间适合改变后的电子设计，而不会影响原始电子设计的编译期间先前适合的太多逻辑。最初，编译器尝试将电子设计更改部分的逻辑单元装配到硬件设备的可用逻辑元件上，同时将逻辑单元从更改的电子设计的未更改部分限制到其原始位置。

如果此操作失败，则编译器允许逻辑单元从更改后的电子设计的未更改部分移至目标硬件设备内的其他逻辑元素，数量有限。起初，此转换受到相当大的限制，以便保留尽可能多的原始编译位置。但是，如果在这些约束条件下无法完成拟合，则逐渐取消约束条件，直到实现拟合为止。展开▼

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公开/公告号US6102964A

专利类型
公开/公告日2000-08-15

原文格式PDF
申请/专利权人 ALTERA CORPORATION;
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申请/专利号US19970958436
发明设计人 JOHN TSE;FUNG FUNG LEE;DAVID WOLK MENDEL;
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申请日1997-10-27
分类号G06F17/50;
国家 US
入库时间 2022-08-22 01:36:27

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