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Reduction of dislocations in a heteroepitaxial semiconductor structure
Reduction of dislocations in a heteroepitaxial semiconductor structure
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机译:减少异质外延半导体结构中的位错
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摘要
A heteroepitaxial semiconductor device having reduced density of threading dislocations and a process for forming such a device. According to one embodiment, the device includes a substrate which is heat treated to a temperature in excess of 1000 C., a film of arsenic formed on the substrate at a temperature between 800 C. and 840 C., a GaAs nucleation layer of less than 200 angstroms and formed at a temperature between about 350 C. and 450 C., and a plurality of stacked groups of layers of InP, wherein adjacent InP layers are formed at different temperatures.
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