首页> 外国专利> Decoupled address and data access to SDRAM for reading and writing data to and from SDRAM through buffer manager; converts information from flat memory address space into SDRAM address space while synchronizing data

Decoupled address and data access to SDRAM for reading and writing data to and from SDRAM through buffer manager; converts information from flat memory address space into SDRAM address space while synchronizing data

机译:解耦对SDRAM的地址和数据访问,以通过缓冲区管理器在SDRAM中读写数据;在同步数据的同时将信息从平面存储器地址空间转换为SDRAM地址空间

摘要

A buffer manager provides address information for reading and writing data to and from an SDRAM. This information is converted from a flat memory address space into an SDRAM address space. The buffer manager works on the basis of a first clock pulse. The SDRAM works on the basis of a second clock pulse. Synchronizer switching synchronizes the data. Address information is converted at the same time as the data is synchronized.
机译:缓冲区管理器提供地址信息,用于在SDRAM中读写数据。该信息从平面存储器地址空间转换为SDRAM地址空间。缓冲区管理器基于第一个时钟脉冲工作。 SDRAM在第二个时钟脉冲的基础上工作。同步器切换将同步数据。地址信息在同步数据的同时进行转换。

著录项

  • 公开/公告号DE19943176A1

    专利类型

  • 公开/公告日2000-03-23

    原文格式PDF

  • 申请/专利权人 NATIONAL SEMICONDUCTOR CORP. SANTA CLARA;

    申请/专利号DE1999143176

  • 发明设计人 WEN SHEUNG-FAN;

    申请日1999-09-09

  • 分类号G06F12/10;G11C11/407;

  • 国家 DE

  • 入库时间 2022-08-22 01:42:04

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