首页> 外国专利> CRC code generation circuit for generating a CRC code and a code error detection circuit for detecting a code error in a CRC code word

CRC code generation circuit for generating a CRC code and a code error detection circuit for detecting a code error in a CRC code word

机译:用于生成CRC码的CRC码生成电路和用于检测CRC码字中的码错误的码错误检测电路

摘要

When encoding, data bits in a CRC code word are received for every bit by a dividing circuit where the CRC code word is divided by a generation polynomial and a remainder is output from parallel data output terminals. The remainder is added to a CRC intrinsic value and "0" information in the adder. The addition result is a CRC code in a CRC code word for transmission. When a code error is detected, data bits in a CRC code word and a CRC code are received for every bit by the dividing circuit, where they are divided by the generation polynomial and a remainder is output from the respective parallel data terminals. The remainder data is added to the CRC intrinsic value in the adder, and the result is further processed by a logical sum circuit. The logical sum is output as a CRC flag. The present invention provides a CRC code generation circuit for generating a CRC code in a CRC code word at high speed as well as a code error detection circuit for detecting a code error in a CRC code word at high speed.
机译:在编码时,通过除法电路为每个比特接收CRC码字中的数据位,在该除法电路中,将CRC码字除以生成多项式,然后从并行数据输出端子输出余数。余数在加法器中添加到CRC固有值和“ 0”信息中。相加结果是CRC码字中的CRC码用于传输。当检测到代码错误时,通过除法电路为每个比特接收CRC代码字和CRC代码中的数据比特,在其中将它们通过生成多项式除,并且从各个并行数据端子输出余数。其余数据在加法器中加到CRC固有值,结果由逻辑求和电路进一步处理。逻辑和作为CRC标志输出。本发明提供了一种用于高速生成CRC码字中的CRC码的CRC码生成电路,以及用于高速检测CRC码字中的码错误的码错误检测电路。

著录项

  • 公开/公告号US5870413A

    专利类型

  • 公开/公告日1999-02-09

    原文格式PDF

  • 申请/专利权人 MITSUBISHI DENKI KABUSHIKI KAISHA;

    申请/专利号US19970820385

  • 发明设计人 YUKIO KODAMA;KAZUO MURAKAMI;

    申请日1997-03-12

  • 分类号G06F11/10;

  • 国家 US

  • 入库时间 2022-08-22 02:08:44

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