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Mask pattern verification device using super-resolution technology, method thereof, and media recording the program
Mask pattern verification device using super-resolution technology, method thereof, and media recording the program
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机译:使用超分辨率技术的掩模图案验证装置,方法及记录程序的媒体
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摘要
The mask pattern verification apparatus includes a semiconductor circuit layout unit for generating layout data from semiconductor circuit data and a verification unit for verifying the pattern of the layout data generated by the semiconductor circuit layout unit based on the pitch obtained by adding the line width and the space width An optical simulation unit for performing optical simulation of an error portion of the pitch detected by the super-resolution pattern verifying unit and for outputting the light intensity, and an optical simulation unit for performing a cantour based on the light intensity output by the optical simulation unit And a car tour output unit for generating and outputting the car tour.
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机译:掩模图案验证设备包括:半导体电路布局单元,用于从半导体电路数据生成布局数据;以及验证单元,用于基于通过将线宽和线宽相加而获得的间距来验证由半导体电路布局单元生成的布局数据的模式。 space width space width光学模拟单元,用于对由超分辨率图案验证单元检测到的节距的误差部分进行光学模拟并输出光强度,以及用于基于由图像分辨率输出的光强度进行cantour的光学模拟单元。光学模拟单元和汽车巡回输出单元,用于生成和输出汽车巡回。
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