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BIPHASE CLOCK DETECTING CIRCUIT IN THE ATIP DECODING APPARATUS
BIPHASE CLOCK DETECTING CIRCUIT IN THE ATIP DECODING APPARATUS
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机译:ATIP解码设备中的双相时钟检测电路
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摘要
The bi-phase clock extraction circuit is used in the ATIP decoding apparatus of a recordable compact disc player, and FM demodulates the ATIP data extracted from the disc to obtain the bi-phase data and depress the registered bi-phase clock. An edge detector for detecting edges of biphase data for this purpose; Pulse width adjusting means for adjusting the pulse width of the output signal in non-triggered synchronization with the output signal of the edge detector; And a frequency multiplier for multiplying the frequency of the signal output from the pulse width adjusting means by a predetermined multiple. This simplifies the circuit and extracts the correct biphase clock.
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