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Semiconductor memory device having dual boosting circuits to reduce energy required to supply boosting voltages
Semiconductor memory device having dual boosting circuits to reduce energy required to supply boosting voltages
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机译：具有双升压电路的半导体存储器件，以减少提供升压电压所需的能量
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摘要
A semiconductor memory device includes pairs of bit lines, first circuits which are respectively coupled to the pairs of bit lines and precharge the pairs of bit lines in accordance with a first control signal, sense amplifiers respectively coupled to the pairs of bit lines, and second circuits which are respectively provided between the pairs of bit lines and the sense amplifiers and selectively connect the pairs of bit line to the sense amplifiers in response to a second control signal. A third circuit produces first and second boosted voltages from a power supply voltage and supplies the first and second boosted voltages to the first and second circuits respectively. The first control signal is produced from the first boosted voltage and the second control signal is produced from the second boosted voltage. The first boosted voltage being lower than the second boosted voltage.
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