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Method and apparatus for predicting valid performance of virtual-address to physical-address translations

机译:预测虚拟地址到物理地址转换的有效性能的方法和装置

摘要

A prediction logic device operating in conjunction with a vector processor to predict, before the completion of the translation of the virtual addresses of all of the data elements of a vector, the valid performace of all virtual-address to physical-address translations for the data elements of the vector. The prediction logic device asserts an MMOK signal to a scalar processor when it becomes known that no memory management fault and/or translation buffer miss will occur such that the scalar processor can resume vector instruction issue to the vector processor at the earliest possible time.
机译:一种预测逻辑设备,与向量处理器配合操作,以在向量的所有数据元素的虚拟地址转换完成之前预测该数据的所有虚拟地址到物理地址转换的有效执行向量的元素。当得知不会发生存储器管理故障和/或转换缓冲区未命中时,预测逻辑设备将MMOK信号声明给标量处理器,从而使标量处理器可以在最早的时间恢复向矢量处理器发出矢量指令。

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