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INVERSE LOGICAL EXPANSION SYSTEM IN COMBINATIONAL LOGICAL CIRCUIT
INVERSE LOGICAL EXPANSION SYSTEM IN COMBINATIONAL LOGICAL CIRCUIT
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机译：组合逻辑电路中的逆逻辑展开系统
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摘要
PROBLEM TO BE SOLVED: To obtain a system which enables fast inverse logical expansion in a combinational logical circuit. ;SOLUTION: An initial setting means 21 sets the logical state of an input terminal, initializes a temporary decision level (dlevel) that shows the number of temporary decisions and sets a state 'X' (Don't Care) as an initial state of an implication operation on a logical state unpredictive line, and a 1st implication operating means 23 performs an implication operation by using states '0', '1', 'U (Unknown)' and 'X'. When a logical contradiction deciding means 24 does not detect the contradiction of a logical state of each line during an implication operation, a processing end deciding means 25 decides whether the logical state of the whole lines is estimated '0' or '1'. Further, when an undefined state 'U' line exists, a logical value temporary deciding means 27 selects one among the state 'U' lines and temporarily decides it as '0', increases a temporary decision level (dlevel) that expresses the number of temporary decisions by only one and returns to implication operation processing that is performed by the means 23.;COPYRIGHT: (C)1998,JPO
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