首页> 外国专利> PEAK CLIPPING CIRCUIT AND ORTHOGONAL MODULATION TRANSMITTER HAVING THE PEAK CLIPPING CIRCUIT

PEAK CLIPPING CIRCUIT AND ORTHOGONAL MODULATION TRANSMITTER HAVING THE PEAK CLIPPING CIRCUIT

机译:削峰电路和具有削峰电路的正交调制发射器

摘要

PROBLEM TO BE SOLVED: To provide a peak clipping circuit that is configured with a small-scale hardware without the need for a multiplier. ;SOLUTION: A clipping level generating circuit 10 generates clipping level data, and a sign inversion circuit 11 inverts the sign of the data. A 1st comparator circuit 12 compares sample data of an I signal with clipping level data and with output data from the sign inversion circuit 11. A 1st selection circuit 13 provides an output of the sample data without modifications, when the sample data of the I signal are more than the output data from the sign inversion circuit 11 and less than the clipping level data, and provides an output of the output data from the sign inversion circuit 11 or the clipping level data in other cases. A 2nd comparator circuit 14 and a 2nd selection circuit 15 conduct processings similar to above on a Q signal.;COPYRIGHT: (C)1998,JPO
机译:要解决的问题:提供一种峰值削波电路,该电路配置有小规模的硬件,而无需乘法器。 ;解决方案:限幅电平产生电路10产生限幅电平数据,并且符号反转电路11将数据的符号反转。第一比较器电路12将I信号的样本数据与削波电平数据以及来自符号反转电路11的输出数据进行比较。当I信号的样本数据时,第一选择电路13不经修改地提供样本数据的输出。大于符号反转电路11的输出数据且小于限幅电平数据,并且在其他情况下提供来自符号反转电路11的输出数据或限幅电平数据的输出。第二比较器电路14和第二选择电路15对Q信号进行与上述类似的处理。版权所有:(C)1998,JPO

著录项

  • 公开/公告号JPH10294766A

    专利类型

  • 公开/公告日1998-11-04

    原文格式PDF

  • 申请/专利权人 SAITAMA NIPPON DENKI KK;

    申请/专利号JP19970103614

  • 发明设计人 MUTO HIROYASU;

    申请日1997-04-21

  • 分类号H04L27/36;

  • 国家 JP

  • 入库时间 2022-08-22 03:05:55

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