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Method for manufacturing a trench in a substrate for use in smart- power technology

机译:在衬底中制造用于智能功率技术的沟槽的方法

摘要

A method for manufacturing a trench in a substrate that has at least a first silicon layer, an insulating layer and a second silicon layer is disclosed. A first trench etching through the first silicon layer down to the insulating layer is implemented using a trench mask. By reinforcing the trench mask with a non-conformally deposited protective layer, the insulating layer is etched through down to the second silicon layer in a second trench etching. The method is particularly suited for the manufacture of insulation trenches having integrated substrate contacting for smart-power technology on an SOI substrate.
机译:公开了一种用于在具有至少第一硅层,绝缘层和第二硅层的衬底中制造沟槽的方法。使用沟槽掩模来实现从第一硅层一直向下到绝缘层的第一沟槽蚀刻。通过用非保形沉积的保护层来增强沟槽掩模,在第二沟槽蚀刻中将绝缘层向下蚀刻至第二硅层。该方法特别适合于制造具有集成衬底接触的绝缘沟槽,以在SOI衬底上实现智能功率技术。

著录项

  • 公开/公告号US5445988A

    专利类型

  • 公开/公告日1995-08-29

    原文格式PDF

  • 申请/专利权人 SIEMENS AKTIENGESELLSCHAFT;

    申请/专利号US19940272591

  • 发明设计人 UDO SCHWALKE;

    申请日1994-07-11

  • 分类号H01L21/76;

  • 国家 US

  • 入库时间 2022-08-22 04:04:25

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