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Semiconductor memory device having diagnostic circuit for comparing multi- bit read-out test data signal with multi-bit write-in test data signal stored in serial-input shift register
Semiconductor memory device having diagnostic circuit for comparing multi- bit read-out test data signal with multi-bit write-in test data signal stored in serial-input shift register
A dynamic random access memory device is subjected to a diagnosis upon completion of fabrication to see whether or not a defective memory cell is incorporated in memory cell sub-arrays, one of the input/output data buffer circuits incorporated therein transfers test bits in serial to a shift register which in turn transfers the test bits in parallel to data line pairs for writing the test bits into the memory cell sub-arrays, and a comparator compares the test bits read out from the memory cell sub- arrays with the test bit stored in the shift register for producing a diagnostic signal indicative of consistence or inconsistence between the test bits read out from the memory cell sub- arrays and the test bits in the shift register, thereby allowing an external diagnostic system with data pins less than the input/output data buffer circuits to carry out the diagnosis.
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