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MOS-gated power semiconductor device having overcurrent and over-temperature protection - has MOSFET which turns off to isolate gate from input voltage and limit current sunk by gate pin, and MOSFET to short power MOSFET gate to its source
MOS-gated power semiconductor device having overcurrent and over-temperature protection - has MOSFET which turns off to isolate gate from input voltage and limit current sunk by gate pin, and MOSFET to short power MOSFET gate to its source
Control power voltage Vcc is applied through a first MOSFET 20 connected between the gate pin 16 and the gate electrode 10 of the power device. A second control MOSFET 14 is connected across the power device gate 10 and source 12 electrodes. The first control MOSFET is turned off and the second control MOSFET is turned on in response to a fault condition. The turn off of the first MOSFET limits the current sunk by the gate pin. A boot strap circuit permits the use of all N channel control MOSFETs with an N channel power device, and a trimmable temperature shutdown circuit is provided. A bipolar transistor is also integrated into the chip to prevent conduction of the P well/N epi diode formed in the device substrate.
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机译：通过连接在功率器件的栅极引脚16和栅电极10之间的第一MOSFET 20施加控制电源电压Vcc。第二控制MOSFET 14跨接在功率器件栅极10和源极12电极之间。响应故障情况，第一控制MOSFET截止，第二控制MOSFET导通。第一个MOSFET的关断限制了栅极引脚吸收的电流。自举电路允许所有N沟道控制MOSFET与N沟道功率器件一起使用，并提供可调节的温度关闭电路。双极晶体管也集成到芯片中，以防止形成在器件衬底中的P阱/ N Epi二极管导通。
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