首页> 外国专利> Electrical apparatus for the prcessamento enhanced digital images; improved method for generation of addresses for memory access to be random to one or more pixels are extracted byAn input image digital electronics has a limit; address generator circuit improved for the generation of addresses in a random access memory for one or more pixels areExtracted from at least one input image digital electronics has a limit; electric appliance perfected for the processing of digital images; improved method for processing DAt least one input image digital electronics has a limit to derive an output image processed digital electronics; random access memory in a processing circuit ofDigital images and random access memory in a table of conference to a processing circuit of digital images

Electrical apparatus for the prcessamento enhanced digital images; improved method for generation of addresses for memory access to be random to one or more pixels are extracted byAn input image digital electronics has a limit; address generator circuit improved for the generation of addresses in a random access memory for one or more pixels areExtracted from at least one input image digital electronics has a limit; electric appliance perfected for the processing of digital images; improved method for processing DAt least one input image digital electronics has a limit to derive an output image processed digital electronics; random access memory in a processing circuit ofDigital images and random access memory in a table of conference to a processing circuit of digital images

机译:用于增强增强型数字图像的电气设备;一种改进的生成地址的方法,用于通过以下方式提取对一个或多个像素随机访问的存储器:输入图像数字电子设备有一个限制;从至少一个输入图像中提取出的数字发生器有一个极限;改进的地址发生器电路,用于在一个或多个像素的随机存取存储器中生成地址。完美处理数字图像的电器;用于处理DA的改进方法至少一个输入图像数字电子设备具有导出输出图像处理的数字电子设备的限制;数字图像处理电路中的随机存取存储器和会议桌中的数字图像处理电路中的随机存取存储器

摘要

A programmable general purpose digital image processing circuit 30 incorporates pipeline image processing architecture including one or more pipeline processing chains 379 for making image processing computations, each chain comprising a serial connection of a convolution (CONVOL) unit 34, logic (LU) unit 35, morphological (MORPH) unit 36 and look-up table (LUT) unit 37, which enables the greatest number of processing operations to be performed within the shortest possible overhead time.
机译:可编程通用数字图像处理电路30合并了流水线图像处理架构,该流水线图像处理架构包括一个或多个用于进行图像处理计算的流水线处理链379,每个链包括卷积(CONVOL)单元34,逻辑(LU)单元35,形态(MORPH)单元36和查找表(LUT)单元37,其使得能够在尽可能短的开销时间内执行最大数量的处理操作。

著录项

  • 公开/公告号BR9402047A

    专利类型

  • 公开/公告日1994-12-20

    原文格式PDF

  • 申请/专利权人 MORPHO SYSTEMES;

    申请/专利号BR19949402047

  • 发明设计人 BERTRAND OBRIOT;JEAN-FRANCOIS ROUSSEAU;

    申请日1994-05-23

  • 分类号G06F15/66;

  • 国家 BR

  • 入库时间 2022-08-22 04:20:18

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