首页> 外国专利> Reduced power line fluctuation/noise circuit by increasing impedance level when number of bus lines simultaneously change state exceeds the predetermined number

Reduced power line fluctuation/noise circuit by increasing impedance level when number of bus lines simultaneously change state exceeds the predetermined number

机译:当同时改变状态的总线数量超过预定数量时,通过增加阻抗级别来减少电源线波动/噪声电路

摘要

A microcomputer that reduces through current of output buffers, and thus, reduces power line fluctuation that occurs when a large number of the bus lines connected to output buffers change state at the same time. The through current (or punch-through current) is reduced through the use of a detector circuit that detects the number of bus lines which are changing state and a decoder circuit that changes the impedance of output buffers, which drive the bus lines to external components, when the number of bus lines changing state at a given time exceeds a predetermined number.
机译:微型计算机减小了输出缓冲器的通过电流,因此减小了当连接到输出缓冲器的大量总线同时改变状态时发生的电源线波动。通过使用检测状态变化的总线数量的检测器电路和改变输出缓冲器阻抗的解码器电路来降低直通电流(或击穿电流),该检测器电路将状态改变的总线驱动到外部组件当在给定时间改变状态的总线数量超过预定数量时。

著录项

  • 公开/公告号US5349666A

    专利类型

  • 公开/公告日1994-09-20

    原文格式PDF

  • 申请/专利权人 MITSUBISHI DENKI KABUSHIKI KAISHA;

    申请/专利号US19920838633

  • 发明设计人 MITSURU ADACHI;TSUNENORI UMEKI;

    申请日1992-02-20

  • 分类号G06F1/26;G08B21/00;H03H11/00;H03K5/08;

  • 国家 US

  • 入库时间 2022-08-22 04:31:06

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