Clocked logic cmos - circuit without time conflict.

• 1. 利用混合CMOS-忆阻器模糊逻辑门电路及其设计方法 [P] . 中国专利： CN109214048A . 2019-01-15
• 2. 基于系统时钟加速的无通信时间同步/扰动同步协同攻击逻辑炸弹检测方法 [P] . 中国专利： CN110602710A . 2019-12-20
• 3. getaktete logical cmos circuit without temporal conflict. [P] . 德国专利： DE3486246D1 . 1993-12-23

  机译： 无需时间冲突即可获得逻辑CMOS电路。

• 4. Racefree CMOS clocked logic circuit [P] . 欧洲知识产权局专利： EP0115834B1 . 1993-11-18

  机译： Racefree CMOS时钟逻辑电路

• 5. Racefree CMOS clocked logic circuit [P] . 美国专利： US4613773A . 1986-09-23

  机译： Racefree CMOS时钟逻辑电路

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• 1. Logic Picture-Based Dynamic Power Estimation for Unit Gate-Delay Model CMOS Circuits [J] . Omnia S. Ahmed ,Mohamed F. Abu-Elyazeed ,Mohamed B. Abdelhalim . 电路与系统（英文） . 2013,第3期
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