首页>
外国专利>
Data processing system buffering sequential data for cyclically recurrent delay times, memory address generator for use in such system
Data processing system buffering sequential data for cyclically recurrent delay times, memory address generator for use in such system
展开▼
机译：数据处理系统，为连续循环的延迟时间缓冲顺序数据，在该系统中使用的存储器地址生成器
展开▼
页面导航
摘要
著录项
相似文献
摘要
A data processing system buffers sequential data for the duration of cyclically recurrent delay times. Memory location allocation is performed in such a way, that the memory is used efficiently without data-shifting after a read-out, and that the address generator is fairly simple.
展开▼
