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Coincidence extendable programmable logic device

机译:重合可扩展可编程逻辑器件

摘要

A required number of coincidence detecting circuits for the combinations of N input signals are provided, so that useless PLEs as seen in a table lookup type are eliminated. Product term lines of PLA are extended by a first extension circuit. Similarly, respective coincidence detecting outputs of coincidence detecting circuits of another PLE are connected to each other, so that coincidence signals can be output in association with M (N) input signals. Coincidence detecting signals of further PLE are connected by a second extension circuit, whereby the number of storing of combinations of N or M input signals is extended to P sets or more, so that the number of input signals N can be set at a low value. There are added programmable selectors for making some of input signals into the coincidence detecting circuits replaceable with other input signals, so that the operating efficiency of PLE can be improved.
机译:提供了用于N个输入信号的组合的所需数量的一致检测电路,从而消除了在查表类型中看到的无用PLE。 PLA的乘积项线由第一扩展电路扩展。类似地,另一个PLE的重合检测电路的各个重合检测输出彼此连接,从而可以与M(N)个输入信号相关联地输出重合信号。另外的PLE的重合检测信号通过第二扩展电路连接,从而将N个或M个输入信号的组合的存储数量扩展到P组以上,从而可以将输入信号N的数量设置为低值。 。增加了可编程选择器,用于使某些输入信号进入可被其他输入信号替换的同时检测电路中,从而可以提高PLE的工作效率。

著录项

  • 公开/公告号US5003202A

    专利类型

  • 公开/公告日1991-03-26

    原文格式PDF

  • 申请/专利权人 KAWASAKI STEEL CORPORATION;

    申请/专利号US19890295348

  • 发明设计人 HISAYA KEIDA;

    申请日1989-01-10

  • 分类号H03K19/094;

  • 国家 US

  • 入库时间 2022-08-22 05:46:46

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