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CONSTITUTION FOR EXPANDING LOGIC SCALE OF A PROGRAMMABLE LOGIC ARRAY

机译:构成可编程逻辑阵列的逻辑规模的构成

摘要

Semiconductor switching elements (22) provided at PLA intersecting points undergo switching operation being controlled by logic setting data sent from an external unit to set a logic circuit. A logic operation is carried out by the thus set logic circuit in response to the input signals and the result of operation that is obtained is produced. A memory circuit (23) stores logic setting data in m advance, and a setting circuit (24) successively selects one by one the logic setting data from the logic setting data stored in the memory circuit (23) and supplies them to the logic array unit (21) to switch the logic circuit in the logic array unit (21).
机译:设置在PLA相交点处的半导体开关元件(22)经历开关操作,该开关操作由从外部单元发送的逻辑设置数据控制以设置逻辑电路。如此设置的逻辑电路响应于输入信号执行逻辑运算,并且产生所获得的运算结果。存储器电路(23)预先存储有m个逻辑设定数据,设定电路(24)从存储在存储器电路(23)中的逻辑设定数据中依次一个接一个地选择逻辑设定数据,并提供给逻辑阵列。单元(21)切换逻辑阵列单元(21)中的逻辑电路。

著录项

  • 公开/公告号AU614426B2

    专利类型

  • 公开/公告日1991-08-29

    原文格式PDF

  • 申请/专利权人 FUJITSU LIMITED;

    申请/专利号AU19890041996

  • 申请日1989-08-30

  • 分类号H03K19/177;

  • 国家 AU

  • 入库时间 2022-08-22 05:55:07

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