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Method of making closely spaced contacts to PN-junction using stacked polysilicon layers, differential etching and ion implantations
Method of making closely spaced contacts to PN-junction using stacked polysilicon layers, differential etching and ion implantations
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机译：使用堆叠的多晶硅层，微分蚀刻和离子注入使PN结紧密接触的方法
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摘要
A means and method is described for forming closely spaced contacts to adjacent semiconductor regions, such as the base and emitter of a bipolar transistor, so that the lateral voltage drops between the contacts and an intervening junction are minimized. The emitter and base and the contacts thereto are self-aligned. This is accomplished by a structure utilizing two poly-layers separated by one or more intermediate dielectric layers. The upper of the two poly-layers serves as a selective etching mask for defining the contact geometry and separation. The lower of the two poly- layers has one portion which becomes a poly-contact and diffusion source for the base region and a second portion which becomes a poly-contact and diffusion source for the emitter region. A single mask is used in connection with ion bombardment to alter the etch rate of portions of the poly-layers. This mask together with subsequent etch steps, defines the emitter width and location and the base-emitter contact separation. The process is self-aligning.
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