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Arrays of the switching time division multiplex has a buffer memory of the type of associative addressable by its contents

机译:交换时分多路复用的阵列具有一个可通过其内容寻址的关联类型的缓冲存储器

摘要

P a.reseau of the switching time division multiplex a. / p & & p & b.il comprises, in a stage of the input a of the incoming multiplex supermultiplexees by an incoming supermultiplex; in an output stage of an outgoing plurality in a part of the outgoing multiplex; a buffer memory is a flow that is addressable by its contents, having its input write connected to the incoming supermultiplex and its output connected to the reading channel supermultiplex outgoing and comprising the locations of data words and addresses random and it is characterizes in that it comprises means to write in the buffer memory addresses associated to the data words and means of a unit increment of these addresses at each step of the memory is a flow. / p & & p & c.commutation. / p
机译:切换时分复用a.reseau / p & & b.il包括,在输入的阶段中,通过输入超级多路复用器输入多个输入多路复用器;在输出多路复用的一部分中的输出多个的输出级中;缓冲存储器是一种可通过其内容寻址的流,其输入写操作连接到输入的超级多路复用器,其输出连接到读取通道的超级多路复用器,输出流包括数据字和地址的位置,并且是随机的,其特征在于:将与数据字相关联的地址写入缓冲存储器中的手段以及在存储器的每个步骤中这些地址的单位增量的手段都是流程。 & & c。换向。

著录项

  • 公开/公告号FR2456434B1

    专利类型

  • 公开/公告日1983-11-25

    原文格式PDF

  • 申请/专利权人 SERVEL MICHEL;

    申请/专利号FR19790012080

  • 发明设计人

    申请日1979-05-11

  • 分类号H04J3/00;

  • 国家 FR

  • 入库时间 2022-08-22 08:46:04

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