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Digital compandor having nonlinear companding characteristics

机译:具有非线性压扩特性的数字压扩器

摘要

A compandor converts a linear code signal consisting of a polarity bit and a plurality of absolute value bits. The polarity bit represents the polarity of each sample value of an original analog signal. The absolute value bits represent the absolute value of the sample. The compandor converts the linear code into a nonlinear code including the polarity bit, a plurality of segment bits representing the segments in a characteristic curve to which the original analog signal belongs, and mantissa bits which indicate the position of the sample value in that segment. The compandor comprises: a plurality of input terminals for receiving the linear code signal; a first read-only memory means, addressed by a first bit group among the absolute value bits for memorizing a segment bit decision rule; a second read-only memory means, addressed by a second bit group consisting of another plurality of bits among the absolute value bits and some bits in common with the first bit group for memorizing a first mantissa bit decision rule; a third read- only memory means, addressed by the first bit group, for memorizing a second mantissa bit decision rule; and means for selecting the second or third read-only memory means depending on the value of the most significant bit among the segment bits supplied from the first read-only memory means.
机译:压扩器转换由极性位和多个绝对值位组成的线性代码信号。极性位表示原始模拟信号的每个采样值的极性。绝对值位代表样本的绝对值。压扩器将线性代码转换为非线性代码,该非线性代码包括极性位,表示原始模拟信号所属的特性曲线中的片段的多个片段位,以及指示样本值在该片段中的位置的尾数位。压扩器包括:多个输入端子,用于接收线性代码信号;以及第一只读存储装置,由绝对值位中的第一位组寻址以存储段位决定规则;第二只读存储装置,由第二位组寻址,该第二位组由绝对值位中的另一多个位以及与第一位组共同的一些位组成,用于存储第一尾数位决定规则;由第一位组寻址的第三只读存储装置,用于存储第二尾数位确定规则;用于根据从第一只读存储装置提供的段位中的最高有效位的值来选择第二或第三只读存储装置的装置。

著录项

  • 公开/公告号US4393367A

    专利类型

  • 公开/公告日1983-07-12

    原文格式PDF

  • 申请/专利权人 NIPPON ELECTRIC CO. LTD.;

    申请/专利号US19790069384

  • 发明设计人 RIKIO MARUTA;ATSUSHI TOMOZAWA;

    申请日1979-08-24

  • 分类号H04L3/00;

  • 国家 US

  • 入库时间 2022-08-22 09:49:47

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