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proud past, according to the principle of staggered working analog digitalwandler coding

机译:以交错工作模拟数字万德勒编码的原理为荣

摘要

The simple analogue to digital converter circuit consists of a single store and feedback comparison stage which generates a serially encoded binary output and is suitable for integrated circuit construction. The circuit consists of an input sampling switch and capacitance hold element which feeds a comparator amplifier, the other input of which is supplied by a stepped comparison voltage. The comparator output feeds a flip flop which feeds back to the held capacitance through a discharging resistance. As the flip-flop is clocked and the comparison voltage stepped, a binary output equivalent to the analogue input is produced until the hold capacitance is fully discharged.
机译:简单的模数转换器电路由一个存储和反馈比较级组成,该级生成串行编码的二进制输出,适用于集成电路构造。该电路由输入采样开关和电容保持元件组成,该元件为比较器放大器供电,比较器放大器的另一输入由阶梯式比较电压提供。比较器输出馈入触发器,该触发器通过放电电阻反馈回保持的电容。当触发器计时且比较电压步进时,将产生等效于模拟输入的二进制输出,直到保持电容完全放电。

著录项

  • 公开/公告号DE000002022267A

    专利类型

  • 公开/公告日1971-11-18

    原文格式PDF

  • 申请/专利权人 SIEMENS AG;

    申请/专利号DE2022267A

  • 发明设计人 PASCHER HELMUT DR-ING;

    申请日1970-05-06

  • 分类号H03K13/10;

  • 国家 DE

  • 入库时间 2022-08-23 08:36:21

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