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CONTINUOUS GLOBAL REPRESENTATION OF LOCAL DATA USING EFFECTIVE AREAS IN INTEGRATED CIRCUIT LAYOUTS

机译:使用集成电路布局中的有效区域连续全局表示本地数据

摘要

Embodiments provide a method for representing a layout of an integrated circuit. In example embodiments, a method includes determining multiple regions of an integrated circuit (IC) layout design based on one or more parameters. In embodiments, at least one region of the multiple regions has a characteristic. The example method further includes determining multiple areas associated with the multiple regions. Each area of the multiple areas has a characteristic of a region of the multiple regions. The example method further includes assigning a first set of values to locations of the IC layout design outside the multiple areas, assigning a second set of values to locations of the IC layout design within the multiple areas, and, in response to a determination that a location of the IC layout design is located in two or more overlapping areas of the multiple plurality of areas, determining a value to assign to the location based at least in part on values of the two or more overlapping areas of the multiple areas. The example method further includes generating, using a processor, an integrated circuit (IC) representation of the IC layout design based at least in part on the first values, the second values, and the value.
机译:实施例提供了用于表示集成电路的布局的方法。在示例实施方式中,一种方法包括确定基于一个或多个参数的集成电路(IC)设计布局的多个区域。在实施方案中,所述多个区域中的至少一个区域具有的特征。该示例方法还包括确定与所述多个区域相关联的多个区域。多个区域中的每个区域具有多个区域的一个区域的特性。该示例方法还包括于确定一个指派的第一组值与所述多个区域外部的IC布局设计的位置,到所述多个区域内的IC布局设计的位置分配第二组值,以及,响应的IC布局设计的位置位于所述多个多个区域中的两个或更多个重叠的区域中,确定值分配给至少基于位置部分地基于所述多个区域的两个或更多个重叠的区域的值。该示例方法还包括生成,使用一个处理器,在所述第一值,所述第二值至少部分地基于所述IC布局设计的集成电路(IC)表示,并且该值。

著录项

  • 公开/公告号US2021256189A1

    专利类型

  • 公开/公告日2021-08-19

    原文格式PDF

  • 申请/专利权人 SYNOPSYS INC.;

    申请/专利号US202117175312

  • 发明设计人 RALPH IVERSON;

    申请日2021-02-12

  • 分类号G06F30/392;G06F30/398;

  • 国家 US

  • 入库时间 2022-08-24 20:41:16

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