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Automated Design Methodology for CMOS Analog Circuit Blocks in Complex Systems

机译:复杂系统中CMOS模拟电路模块的自动设计方法

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摘要

A design methodology for analog circuit blocks is proposed which combines circuit knowledge for predefined topologies with CAD simulation tools. In a more complex analog or mixed-signal system design metrics for each block are first established during an exploration phase based on analytical descriptions. In the proposed approach behavioral equations for each circuit are derived using a basic EKV model. Selection of a performance point in the design space results in a first sizing of the transistors in each block. This is followed by SPICE verification using foundry-provided process data. Additional numerical optimization is applied in a second iteration for closing the gap with the requirement specification.
机译:提出了一种模拟电路模块的设计方法,该方法将具有预定义拓扑的电路知识与CAD仿真工具相结合。在更复杂的模拟或混合信号系统中,每个块的设计指标都是在探索阶段根据分析说明建立的。在提出的方法中,使用基本EKV模型导出每个电路的行为方程。在设计空间中选择性能点会导致每个块中晶体管的第一尺寸。接下来是使用铸造厂提供的过程数据进行SPICE验证。在第二次迭代中应用了附加的数值优化,以缩小与需求规范的差距。

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