• 主题
高级搜索  >
历史搜索 清空历史
首页> 外文会议>12th International Workshop on Integrated Circuit Design: Power and Timing Modeling, Optimization and Simulation PATMOS 2002, Sep 11-13, 2002, Seville, Spain >Designing Carry Look-Ahead Adders with an Adiabatic Logic Standard-Cell Library
【24h】

Designing Carry Look-Ahead Adders with an Adiabatic Logic Standard-Cell Library

机译：使用绝热逻辑标准单元库设计进位超前加法器

获取原文
获取原文并翻译 | 示例
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

Adiabatic circuits are usually designed with methodologies optimized for the application in which they are used. In this work we show how a conventional design-flow based on an adiabatic standard-cell library and semiautomatic tools allow the quick and easy design and verification of a complex adiabatic system, without loosing the energy reduction benefits. The methodology has been applied to the design of positive feedback adiabatic logic (PFAL) carry look-ahead adders (CLA). Post-layout simulations of the standard-cell PFAL CLAs show a 94% energy recovery as compared to a conventional static CMOS CLA at 10 MHz, and 86% at 100 MHz. The standard-cell PFAL CLAs are also more energy efficient or comparable than other custom adiabatic CLAs found in the literature.
机译：绝热电路通常采用针对其应用而优化的方法进行设计。在这项工作中，我们展示了基于绝热标准单元库和半自动工具的常规设计流程如何在不丧失节能优势的情况下，快速，轻松地设计和验证复杂的绝热系统。该方法已应用于正反馈绝热逻辑（PFAL）携带超前加法器（CLA）的设计。与常规静态CMOS CLA在10 MHz时相比，标准单元PFAL CLA的布局后仿真显示94％的能量回收，在100 MHz时则为86％。与文献中的其他常规绝热CLA相比，标准单元PFAL CLA还具有更高的能源效率或可比性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号