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首页> 外文会议>13th International Workshop on Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation PATMOS 2003; Sep 10-12, 2003; Turin, Italy >High-Level Algorithmic Complexity Analysis for the Implementation of a Motion-JPEG2000 Encoder
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High-Level Algorithmic Complexity Analysis for the Implementation of a Motion-JPEG2000 Encoder

机译：用于Motion-JPEG2000编码器的高级算法复杂度分析

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摘要

The increasing complexity of processing algorithms has lead to the need of more and more intensive specification and validation by means of software implementations. As the complexity grows, the intuitive understanding of the specific processing needs becomes harder. Hence, the architectural implementation choices or the choices between different possible software/hardware partitioning become extremely difficult tasks. Automatic tools for complexity analysis at high abstraction level are nowadays a fundamental need. This paper describes a new automatic tool for high-level algorithmic complexity analysis, the Software Instrumentation Tool (SIT), and presents the results concerning the complexity analysis and design space exploration for the implementation of a JPEG2000 encoder using a hardware/software co-design methodology on a Xilinx Virtex-II~(TM) platform FPGA. The analysis and design process for the implementation of a video surveillance application example is described.
机译：处理算法的复杂性不断增加，导致需要通过软件实现方式进行越来越严格的规范和验证。随着复杂性的增加，对特定处理需求的直观理解变得越来越困难。因此，架构实现选择或不同可能的软件/硬件分区之间的选择成为极其困难的任务。如今，基本需求是用于高抽象级别的自动化工具。本文介绍了一种用于高级算法复杂度分析的新自动工具，即软件仪表工具（SIT），并介绍了有关使用硬件/软件协同设计实现JPEG2000编码器的复杂度分析和设计空间探索的结果Xilinx Virtex-II〜（TM）平台FPGA上的方法论。描述了用于实施视频监控应用示例的分析和设计过程。

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