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Modeling floating body Z-RAM storage cells

机译:建模浮体Z-RAM存储单元

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Advanced floating body Z-RAM memory cells are studied. In particular, the scalability of the cells is investigated. First, a Z-RAM cell based on a 50nm gate length double-gate structure corresponding to state of the art technology is studied. A bi-stable behavior essential for Z-RAM operation is observed even in fully depleted structures. It is demonstrated that by adjusting the supply source-drain and gate voltages the programming window can be adjusted. The programming window is appropriately large in voltage as well as in current. We further extend our study to a Z-RAM cell based on an ultra-scaled double-gate MOSFET with 12.5nm gate length. We demonstrate that the cell preserves its functionality by providing a wide voltage operating window with large current differences. An appropriate operating window is still observed at approximately 25–30% reduced supply voltage, which is an additional benefit of scaling. The relation of the obtained supply voltage to the one anticipated in an ultimate MOSFET with quasi-ballistic transport is discussed.
机译:研究了先进的浮体Z-RAM存储单元。特别地,研究了小区的可伸缩性。首先,研究了基于50nm栅长双栅结构的Z-RAM单元,该结构对应了最新技术。即使在完全耗尽的结构中,也观察到了Z-RAM操作必不可少的双稳态行为。已经证明,通过调节电源的源极-漏极和栅极电压,可以调节编程窗口。编程窗口的电压和电流都适当大。我们进一步将研究扩展到基于具有12.5nm栅极长度的超大规模双栅极MOSFET的Z-RAM单元。我们证明,该电池通过提供一个宽的电压工作范围和大的电流差来保持其功能。在电源电压降低约25%至30%的情况下,仍然可以观察到适当的工作窗口,这是缩放的另一个好处。讨论了获得的电源电压与最终具有准弹道MOSFET的电源电压之间的关系。

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