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Component based design using constraint programming for module placement on FPGAs

机译:使用约束编程的基于组件的设计,用于在FPGA上放置模块

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摘要

Constraint satisfaction modeling is both an efficient, and an elegant approach to model and solve many real world problems. In this paper, we present a constraint solver targeting module placement in static and partial run-time reconfigurable systems. We use the constraint solver to compute feasible placement positions. Our placement model incorporates communication, implementation variants and device configuration granularity. In addition, we model heterogeneous resources such as embedded memory, multipliers and logic. Furthermore, we take into account that logic resources consist of different types including logic only LUTs, arithmetic LUTs with carry chains, and LUTs with distributed memory. Our work targets state of the art field-programmable gate arrays (FPGAs) in both design-time and run-time applications. In order to evaluate our placement model and module placer implementation, we have implemented a repository containing 200 fully functional, placed and routed relocatable modules. The modules are used to implement complete systems. This validates the feasibility of both the model and the module placer. Furthermore, we present simulated results for run-time applications, and compare this to other state of the art research. In run-time applications, the results point to improved resource utilization. This is a result of using a finer tile grid and complex module shapes.
机译:约束满意度建模既是一种高效且优雅的方法,它可以建模和解决许多现实世界中的问题。在本文中,我们提出了针对静态和部分运行时可重配置系统中模块放置的约束求解器。我们使用约束求解器来计算可行的放置位置。我们的放置模型结合了通信,实现变体和设备配置粒度。此外,我们对异构资源建模,例如嵌入式内存,乘法器和逻辑。此外,我们考虑到逻辑资源由不同类型组成,包括仅逻辑LUT,带有进位链的算术LUT和具有分布式内存的LUT。我们的工作针对设计时和运行时应用程序中最先进的现场可编程门阵列(FPGA)。为了评估我们的放置模型和模块放置器的实现,我们实现了一个包含200个功能齐全,放置和路由的可重定位模块的存储库。这些模块用于实施完整的系统。这验证了模型和模块放置器的可行性。此外,我们提供了运行时应用程序的仿真结果,并将其与其他最新技术进行了比较。在运行时应用程序中,结果表明可以提高资源利用率。这是使用更精细的图块网格和复杂的模块形状的结果。

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