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首页> 外文会议>2013 IEEE 5th International Nanoelectronics Conference. >Through-silicon via fabrication with pulse-reverse electroplating for high density nanoelectronics
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Through-silicon via fabrication with pulse-reverse electroplating for high density nanoelectronics

机译：用于高密度纳米电子学的带反向脉冲电镀的穿硅通孔制造

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摘要

In this paper, fabrication of through-silicon vias (TSV) with different diameters ranging from 60 to 150 μm is reported. It was observed that at the low current density of 20 mA/cm2, all the through-holes with different diameters are filled with copper without voids and pores. At higher current density of 40 mA/cm2, however, the pillars with diameters bigger than 100 μm tend to have voids at the middle portion of pillars. Focused ion beam (FIB) examination of the copper pillars fabricated with low current density reveals the difference in grain size and internal structure of the grain along the length of the pillar. Current-potential characters of solution were studied for the electrolyte bath used in the process. It shows the limiting current density around 40–60mA/cm2. The microstructures of TSV fabricated at low and high current densities are investigated and it shows that high current density produces porous copper with void at the core of TSV.
机译：在本文中，报道了直径范围从60到150μm的硅通孔（TSV）的制造。观察到在20 mA / cm 2 的低电流密度下，所有直径不同的通孔都充满了铜，没有空隙和孔。但是，在40 mA / cm 2 的更高电流密度下，直径大于100μm的立柱往往在立柱的中间部分出现空隙。用低电流密度制造的铜柱的聚焦离子束（FIB）检查揭示了沿柱长度方向晶粒尺寸和晶粒内部结构的差异。研究了该工艺中使用的电解液的溶液的电流电位特性。它显示了大约40–60mA / cm 2 的极限电流密度。研究了在低电流密度和高电流密度下制造的硅通孔的微观结构，结果表明，高电流密度产生的多孔铜在硅通孔的核心处带有空隙。

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