Impact of atomic-scale structural design on ultra-short channel (3 nm) MOSFETs

机译：原子尺度结构设计对超短沟道（3 nm）MOSFET的影响

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Electrical performances of ultra-short channel MOSFETs were investigated on SOI substrates. The channel length was scaled to 3 nm using the anisotropic wet etching technique. A difficulty of junction technology was solved by fabrication of Junctionless-FET, which consists of uniform high concentration dopants through the body of device. Superior Junctionless-FET performance was confirmed when the channel thickness and gate dielectric film thickness were scaled close to 1 nm. Experimental and simulation studies suggest that variation of performance originates from atomic-scale fluctuation in device structures.

机译：在SOI衬底上研究了超短沟道MOSFET的电性能。使用各向异性湿蚀刻技术将沟道长度缩放至3nm。结技术的难题通过无结FET的制造得以解决，该结由穿过器件本体的均匀高浓度掺杂剂组成。当沟道厚度和栅极介电膜厚度缩小到接近1 nm时，证实了卓越的Junctionless FET性能。实验和仿真研究表明，性能变化源自器件结构中的原子尺度波动。

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来源
《2013 IEEE 5th International Nanoelectronics Conference.》|2013年|p.132-135|共4页
会议地点 Singapore(SG);Singapore(SG)
作者
Migita Shinji; Morita Yukinori; Masahara Meishoku; Ota Hiroyuki;
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作者单位

Collaborative Research Team Green Nanoelectronics Center, National Institute of Advanced Industrial Science and Technology, AIST Tsukuba West 7A, 16-1 Onogawa, Tsukuba, Ibaraki 305-8569, Japan;

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会议组织
原文格式 PDF
正文语种 eng
中图分类微电子学、集成电路（IC）;微电子学、集成电路（IC）;
关键词
Junctionless-FET; MOSFET; Short Channel; V-groove; variation;

机译：无结FET; MOSFET;短沟道; V槽;变化;;

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Impact of atomic-scale structural design on ultra-short channel (3 nm) MOSFETs

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