Packaging Very Fast Switching Semiconductors

机译：封装超快开关半导体

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The switching speed of power semiconductors has reached levels where conventional semiconductor packages limit the achievable performance due to parasitic inductance and capacitance. Designing these parasitics intentionally is the key to overcome this speed limit. This paper gives an overview on relevant parasitic effects in semiconductor properties, package and switching cell design. A module with extremely low dc link inductance is built up using a newly developed packaging technology. The experimental results lead to a proposal for next step in package design for fast switching and minimizing EMI generation.

机译：功率半导体的开关速度已经达到了这样的水平，传统的半导体封装由于寄生电感和电容而限制了可达到的性能。故意设计这些寄生虫是克服此速度限制的关键。本文概述了半导体特性，封装和开关单元设计中的相关寄生效应。使用最新开发的封装技术构建了具有极低直流链路电感的模块。实验结果提出了在封装设计中进行下一步以快速切换并最小化EMI产生的建议。

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《2014 8th International Conference on Integrated Power Systems》|2014年|1-7|共7页
会议地点 Nuremberg(DE)
作者
Hoene Eckart; Ostmann Andreas; Marczok Christoph;
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正文语种 eng
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Packaging Very Fast Switching Semiconductors

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