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Design of low power logic gates by using 32nm and 16nm FinFET technology

机译:利用32nm和16nm FinFET技术设计低功耗逻辑门

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In today's world different technologies are present in case of electronics market. The electronics market grown very rapidly because of most of the devices are compact, innovative, giving more efficiency and consumes less power with very small supply voltage. Because of the advancement in the semiconductor technology, integration of whole electronics system on a single chip is practicable. We have seen the change in the semiconductor technology from personal computer to the laptops and then to the cell phones and thus the mobile and computing markets are continue to innovate at dramatic rate. For all this, the most viable successor is a CMOS technology. But the 22nm node of CMOS fails to perform these operations because the shrinking of this CMOS leads to the short channel effect. Multigate FET technology is the most feasible successor to planar CMOS technology at the 22-nm node and beyond. These multi-gate transistors are called fin field-effect transistors (FinFET). Design of NOR and NAND circuits is present in this paper, to improve the speed and power of these gates. Also in this paper, the comparative study of different performance parameters for CMOS and FinFET technology for basic logic gates is present. Dynamic power, current, static power are some parameters which are evaluated with the help of tanner EDA tool.
机译:在当今世界,电子市场存在着不同的技术。由于大多数设备都是紧凑,创新的,因此电子产品市场发展非常迅速,以很小的电源电压提供更高的效率和更低的功耗。由于半导体技术的进步,将整个电子系统集成在单个芯片上是可行的。我们已经看到半导体技术的变化,从个人计算机到笔记本电脑再到手机,因此移动和计算市场正在以惊人的速度不断创新。为此,最可行的后继产品是CMOS技术。但是CMOS的22nm节点无法执行这些操作,因为此CMOS的缩小会导致短沟道效应。多栅极FET技术是22纳米节点及以后的平面CMOS技术最可行的后继产品。这些多栅极晶体管被称为鳍式场效应晶体管(FinFET)。本文提出了NOR和NAND电路的设计,以提高这些门的速度和功耗。同样在本文中,对基本逻辑门的CMOS和FinFET技术的不同性能参数进行了比较研究。动态功率,电流,静态功率是一些参数,这些参数可借助tanner EDA工具进行评估。

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