High voltage isolation silicon node wafer saw

机译：高压隔离硅节点晶圆锯

获取原文

获取原文并翻译 | 示例

页面导航

摘要
著录项
相似文献
相关主题

摘要

Texas Instruments' high voltage isolation semiconductor devices enable safe transmission of data and power between high voltage and low voltage circuits in modern electrical systems. The silicon technology for isolation contains higher metallization content in the wafer saw street and therefore, requires the assembly dicing process window to be well characterized to enable robust manufacturing and quality. This paper provides an overview of mechanisms that induce top side and flipside silicon chipping, analyzes the impact of metal density in wafer saw street on chipping severity, and discusses the attributes in mechanical saw process that can be characterized to prevent chipping defects in high volume manufacturing.

机译：德州仪器（TI）的高压隔离半导体器件可在现代电气系统中的高压电路和低压电路之间安全地传输数据和电力。用于隔离的硅技术在晶圆锯条街道中包含较高的金属化含量，因此需要对装配切割工艺窗口进行充分表征，以实现可靠的制造和质量。本文概述了引起顶部和背面硅芯片崩裂的机制，分析了晶圆锯道中金属密度对芯片崩裂严重性的影响，并讨论了机械锯工艺中可以防止大量生产中出现芯片缺陷的属性。。

著录项

来源
《2016 IEEE 37th International Electronics Manufacturing Technology amp; 18th Electronics Materials and Packaging Conference》|2016年|1-6|共6页
会议地点 Georgetown(MX)
作者
Wan Md Misuari Bin Wan Md Suleiman; Nageswararau Krishnan;
展开▼
作者单位

Texas Instruments Malaysia, 1, Lorong Enggang 33, Ampang/Ulu Klang 54200 Kuala Lumpur Malaysia;

Texas Instruments Malaysia, 1, Lorong Enggang 33, Ampang/Ulu Klang 54200 Kuala Lumpur Malaysia;

展开▼
会议组织
原文格式 PDF
正文语种 eng
中图分类
关键词
Blades; Silicon; Metallization; Feeds; Friction;

机译：刀片;硅;金属化;进料;摩擦;

相似文献

外文文献
中文文献
专利

1. 铝硅熔体中富集初晶硅提纯硅 [J] . 余文轴, 马文会, 吕国强, 中国有色金属学报（英文版） . 2013,第011期
2. 铝硅熔体中富集初晶硅提纯硅 [J] . 余文轴, 马文会, 吕国强, 中国有色金属学报：英文版 . 2013,第011期
3. Comparison of total dose effects on a voltage reference fabricated on bonded-wafer and polysilicon dielectric isolation [J] . Krieg J.F., Neerman C.J. IEEE Transactions on Nuclear Science . 2000,第6期

机译：在键合晶圆和多晶硅介电隔离上制造的电压基准的总剂量效应比较
4. Characteristics of new dielectric isolation wafers for high voltage power IC's by single-Si poly-Si direct bonding (SPSDB) technique [J] . Inoue Y., Sugawara Y. IEEE Transactions on Electron Devices . 1995,第2期

机译：单硅多晶硅直接键合（SPSDB）技术用于高压功率IC的新型介电隔离晶片的特性
5. CO_2-dissolved water cleans for 2xnm-Node silicon devices in a single wafer megasonic system [J] . Park C.G., Sohn H. Diffusion and Defect Data. Solid State Data, Part B. Solid State Phenomena . 2013,第Null期

机译：溶解有CO_2的水清洗单个晶片兆频超声系统中的2xnm节点硅器件
6. High voltage isolation silicon node wafer saw [C] . Wan Md Misuari Bin Wan Md Suleiman, Nageswararau Krishnan IEEE International Electronics Manufacturing Technology Conference . 2016

机译：高压隔离硅节点晶片锯
7. Simulations and Silicon Wafer Compatibility of a Voltage-Controlled Optical Switch Using ITO/NbOx. [D] . Burghardt, Kevin. 2017

机译：使用ITO / NbOx的压控光开关的仿真和硅晶圆兼容性。
8. Growth and Self-Assembly of Silicon–Silicon Carbide Nanoparticles into Hybrid Worm-Like Nanostructures at the Silicon Wafer Surface [O] . Manuel Alejandro Perez-Guzman, Rebeca Ortega-Amaya, Yasuhiro Matsumoto, 2018

机译：碳化硅-碳化硅纳米粒子在硅晶片表面的生长和自组装成蠕虫状纳米杂化结构。
9. Technical Information. Special Issue. High Voltage Isolation by Silicon Wafer Direct-Bonding Technique. [O] . Yuso Udo 1994

机译：技术信息。特刊。硅晶片直接粘接技术的高压隔离。
10. Silicon-Based On-Wafer Packaging for High Isolation in High-Density Circuits [R] . Katehi, L. P. 1998

机译：基于硅的晶圆封装，用于高密度电路中的高隔离度

High voltage isolation silicon node wafer saw

摘要

著录项

相似文献

相关主题

期刊订阅