Electronics and Communication Department, Kavikulguru Institute of Technology and Science, Ramtek, Affiliated to Rashtrasant Tukdoji Maharaj Nagpur University, India;
Electronics and Communication Department, Kavikulguru Institute of Technology and Science, Ramtek, Affiliated to Rashtrasant Tukdoji Maharaj Nagpur University, India;
Adders; Computer architecture; Delays; Very large scale integration; Logic gates; Conferences; Market research;
机译:新型高性能大价灵加法器
机译:32位高价杰克逊加法器的设计与实现
机译:使用并行前缀加法器进行选择加法器的设计技术,以改善切换能量
机译:高价位玲加法器改进高性能设计综述
机译:使用各种加法器拓扑结构的32位纳米级ALU的设计,实现和性能比较
机译:一步步。午餐时间步行干预的可行性研究旨在增加久坐员工的步行改善其心理健康和工作绩效:基本原理和研究设计
机译:并行前缀加法器的设计与实现,提高携带看法加法器的性能