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Performance analysis of low voltage, low power dynamic double tail comparator for data convertor application

机译:用于数据转换器的低压低功耗动态双尾比较器的性能分析

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Comparators are the basic fundamental blocks for designing high speed Analog and mixed signal system. It is the challenging task to design high speed comparator when the supply voltage is very small. This paper shows the analysis of Double Tail Comparator according to its dynamic power, static power and leakage current. From the analysis of Double Tail Comparator, a new design is proposed which is a modification of Conventional Double Tail Comparator for very small power, small voltage and high speed operation. Here we Tanner EDA software for designing these comparators with 180 nm technology. We compare the results of both of these comparators. It is shown that from the proposed structure of Double Tail Comparator, the leakage current, static power and dynamic power are significantly reduced. For the supply voltage of 0.8 V, the proposed comparator consumes reduced power of 22.3054 nW and current of 27.8818 nA.
机译:比较器是设计高速模拟和混合信号系统的基本基本模块。当电源电压非常小时,设计高速比较器是一项艰巨的任务。本文根据双尾比较器的动态功率,静态功率和漏电流进行了分析。通过对双尾比较器的分析,提出了一种新设计,它是对传统双尾比较器的改进,适用于非常小的功率,小电压和高速运行。在这里,我们使用Tanner EDA软件,以180 nm技术设计这些比较器。我们比较了这两个比较器的结果。从双尾比较器的建议结构可以看出,漏电流,静态功率和动态功率都大大降低了。对于0.8 V的电源电压,拟议的比较器消耗的功耗降低了22.3054 nW,电流消耗了27.8818 nA。

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