Challenges for advanced end of the roadmap, beyond Si and beyond CMOS technologies

机译：超越Si和CMOS技术的路线图的高端挑战

获取原文

获取原文并翻译 | 示例

页面导航

摘要
著录项
相似文献
相关主题

摘要

Future technologies put stringent demands on materials, process modules and device architectures. Design considerations favor the future use of vertical devices like tunnelFETs and nanowires. Heterogenous integration of Ge and III-V technologies on a silicon platform enables to fabricate System-on-Chip applications, while increased functionality is achieved by 3D integration. Attention is also given to the trend and progress in the use of 2D material and devices, spintronics and neuromorphic computing.

机译：未来的技术对材料，工艺模块和设备架构提出了严格的要求。设计方面的考虑因素有利于将来使用诸如TunnelFET和纳米线之类的垂直设备。 Ge和III-V技术在硅平台上的异构集成能够制造片上系统应用，同时通过3D集成实现更高的功能。还应注意2D材料和设备，自旋电子学和神经形态计算的使用趋势和进展。

著录项

来源
《2017 32nd Symposium on Microelectronics Technology and Devices》|2017年|1-6|共6页
会议地点 Fortaleza(BR)
作者
C. Claeys; E. Simoen;
展开▼
作者单位

imec, Kapeldreef, 75, 3001 Leuven, Belgium;

imec, Kapeldreef, 75, 3001 Leuven, Belgium;

展开▼
会议组织
原文格式 PDF
正文语种 eng
中图分类
关键词
Silicon; Logic gates; Two dimensional displays; Spintronics; TFETs; Substrates; Epitaxial growth;

机译：硅;逻辑门;二维显示器;自旋电子学; TFET;基板;外延生长;;

相似文献

外文文献
中文文献
专利

1. Addressing Cu/Low-$k$ Dielectric TDDB-Reliability Challenges for Advanced CMOS Technologies [J] . Chen F., Shinosky M. IEEE Transactions on Electron Devices . 2009,第1期

机译：解决高级CMOS技术对铜/低k $电介质TDDB的可靠性挑战
2. Integrations and challenges of novel high-k gate stacks in advanced CMOS technology [J] . Gang He, Liqiang Zhu, Zhaoqi Sun, Progress in Materials Science . 2011,第5期

机译：先进CMOS技术中新型高k栅极堆叠的集成与挑战
3. An Evaluation of the CMOS Technology Roadmap From the Point of View of Variability, Interconnects, and Power Dissipation [J] . Boeuf F., Sellier M., Farcy A., IEEE Transactions on Electron Devices . 2008,第6期

机译：从可变性，互连和功耗的角度评估CMOS技术路线图
4. Challenges for Advanced End of the Roadmap, Beyond Si and Beyond CMOS Technologies [C] . C. Claeys, E. Simoen Symposium on Microelectronics Technology and Devices . 2017

机译：超越Si及超越CMOS技术的路线图的先进结束挑战
5. Analysis and modeling of parasitic effects in advanced silicon-on-insulator CMOS technologies, including nonclassical ultra-thin-body transistors. [D] . Yang, Ji-Woon. 2004

机译：包括非经典超薄晶体管在内的高级绝缘体上CMOS技术的寄生效应分析和建模。
6. Dynamic pH Sensor with Embedded Calibration Scheme by Advanced CMOS FinFET Technology [O] . Chien-Ping Wang, Ying-Chun Shen, Peng-Chun Liou, 2019

机译：具有嵌入式校准方案的动态pH传感器采用先进的CMOS FinFET技术
7. Challenges and Emerging Technologies for System Integration beyond the End of the Roadmap of Nano-CMOS [O] . Bampi, Sergio, Reis, Ricardo 2009

机译：纳米CMOS路线图结束后的系统集成挑战和新兴技术

Challenges for advanced end of the roadmap, beyond Si and beyond CMOS technologies

摘要

著录项

相似文献

相关主题

期刊订阅