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首页> 外文会议>2017 32nd Symposium on Microelectronics Technology and Devices >Evaluating the impact of electromigration on the integrated circuit performance
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Evaluating the impact of electromigration on the integrated circuit performance

机译：评估电迁移对集成电路性能的影响

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摘要

Electromigration damage in interconnects is a well-known bottleneck of integrated circuits, as it is responsible for performance degradation, affecting parameters like delay and frequency. With the technology scaling, the evaluation of the interconnect reliability for electromigration become more challenge for the chip designers. To guarantee a better performance for longer time, the designers need to identify the critical wires in the circuit layout and to alter it using techniques that retard the electromigration impact on the circuit. Traditional methods based in the Blech Effect and the maximum current density are used to evaluate the circuits concerning wires under electromigration, though conservative. While these methods focus on the magnitude of the current density through each line, the performance variation due to electromigration induced by resistance change is an additional criterion to be considered. Therefore, a more accurate method need to consider besides the interconnect reliability, the circuit performance degradation, due the resistance variation. In this work, it is simulated the effects of the interconnect degradation due the void growth, in the transconductance of transistors from a differential amplifier. After, the analysis is extended to evaluate the unity gain frequency of the amplifier.
机译：互连中的电迁移损坏是集成电路的一个众所周知的瓶颈，因为它会导致性能下降，并影响诸如延迟和频率之类的参数。随着技术的发展，对于电迁移而言，评估互连可靠性对于芯片设计人员而言将面临更大的挑战。为了在更长的时间内保证更好的性能，设计人员需要确定电路布局中的关键导线，并使用能够抑制电迁移对电路影响的技术对其进行更改。尽管保守，但基于Blech效应和最大电流密度的传统方法用于评估与电迁移条件下的导线有关的电路。虽然这些方法着重于通过每条线的电流密度的大小，但是由于电阻变化引起的电迁移而导致的性能变化是要考虑的附加标准。因此，除了互连可靠性之外，还需要考虑一种更精确的方法，这是由于电阻变化引起的电路性能下降。在这项工作中，模拟了来自差分放大器的晶体管的跨导中由于空隙增长而引起的互连退化的影响。之后，扩展分析以评估放大器的单位增益频率。

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